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PART II - Microprocessor Descriptive Questions with Answers

PART – II
DESCRIPTIVES
Question.1  Describe the operation performed by the instruction OUT 47 h, AL.  (3)
Ans  :  It  transfers  the  content  of  AL  to  I/O  port  47h.  Notice  that  I/O  port  number
appears as 0047h on the 16 bit address bus and thatdata from AL appears on the data
bus of the microprocessor.

Question.2   How is 8255 (Programmable Peripheral Interface) configured if its control register
contains 9B h.   (3)
Answer

   9BH => 1001 1011 =>
   b6b5=00-> Mode0
   b4=0-> Port A as input.
   b3=1-> Port C as input (PC7-PC4)
   b2=0-> Mode 0
   b1=1-> Port B as input
   b0=1-> Port C as input (PC3-PC0).



Question.3 Write a control word for counter 1 of 8253 / 8254that selects the following options:
load least significant byte only, mode 5 of operation and binary counting. Then write
an instruction sequence that will load the control word into 8253 / 8254 that is located
at address 01000 h of memory address space. Assumethat 8253 / 8254 is attached to
the I/O bus of the CPU and the address inputs
0
A and
1
A are supplied by
2
A and
3
A
respectively.   (5)
 Answer;
  Based on the above given conditions and assuming  counter 0 is used. The control
word becomes 0001 1010h.
  Identify the port address
  - The CS is enabled when A7=1
  - The Control Register is selected when A1 and A0 =1
  - Assuming unused address lines A6 to A2 are at logic 0,
  Then port address will be as follows
   Control Register = 83H
   Counter 2 = 82H
   MVI A,B0H
   OUT 83H
   MVI A, LOWBYTE
   OUT 82H
   MVI A,HIGHBYTE
   OUT 82H
  LOOP:MVI A,80H
   OUT 83H
   IN 82H
   MOV D,A
   IN 82H
   ORA D
   JNZ LOOP
   RET

 Q.4 ‘Pentium  processor  has  a  superscalar  architecture’.   Explain  the  meaning  of  the
statement.   (4)
Ans
The Pentium microprocessor is organized with three  execution units. One executes
floating-point  instructions,  and  the  other  two  (U-pipe  and  V-pipe)  execute  integer
instructions.  This  means  that  it  is  possible  to  execute  three  instructions
simultaneously.

Q.5 Write a short note on RS-232-C.   (8)
  Ans
 The RS-232 standard is a collection of connectionstandards between different pieces
of  equipment.  The  EIA  RS-232  serial  communication  standard  is  a  universal
standard,  originally  used  to  connect  teletype  terminals  to  modem  devices.  In  a
modern PC the RS-232 interface is referred to as a COM port. The COM port uses a
9-pin D-type connector (Refer Fig (a)) to attach to the RS-232 cable. The RS-232
standard  defines a  25-pin  D-type  connector (Refer Fig   (b))  but  IBM reduced  this
connector to a 9-pin device so as to reduce cost and size.
AC23  Microprocessor Based System Design
12
Fig (a) Female & Male “DB-9” Connector
  Fig 1(b) Female & Male “DB-25” Connector

Question.6
Explain the terms: simplex, half duplex and full duplex.  (6)
Answer;

Simplex Transmission
Data in a simplex channel is always one way. Simplex channels are not often used
because it is not possible to send back error or control signals to the transmit end.
An example of a simplex channel in a computer system is the interface between the
keyboard and the computer, in that key codes need only be sent one way from the
keyboard to the computer system.

Half Duplex Transmission
A half duplex channel can send and receive, but notat the same time. It’s like a onelane bridge where two-way traffic must give way in order to cross. Only one end
transmits at a time, the other end receives.

Full Duplex Transmission
Data can travel in both directions simultaneously. There is no need to switch from
transmit to receive mode like in half duplex. It’s like a two lane bridge on a twolane highway.

Q.7 How  DRAM’s  are  different  from  SRAM’s?   Why  DRAMs  are  said  to  employ
address multiplexing?   (4)
Ans
   Dynamic RAM (DRAM) is essentially the same as SRAM, except that it retains
data for only 2 or 4 ms on an internal capacitor. After 2 or 4 ms, the contents of the
DRAM  must  be  completely  rewritten  (refreshed)  because  the  capacitors,  which
store  logic  1  or  logic  0,  lose  their  charges.  The  entire  content  of  the  memory  is
refreshed with 256 reads in a 2-to-4 ms interval. Refreshing also occurs during a
write, a read or during a special refresh cycle.


Q.8Explain the operation of 8279. Explain thefollowing terms:
(i)  N key Roll over.
(ii)  Key board debounce.
(iii)  FIFO RAM.  (9)
Ans
   The 8279 is a programmable keyboard and display  interfacing component that
scans  and  encodes  up  to  a  64-key  keyboard  and  controls  up  to  a  16-digit
numerical display. The keyboard interface has builtin first-in first-out (FIFO)
buffer that allows it store up to eight keystrokes before the microprocessor must
retrieve a character. The display section controls up to 16 numeric displays from
an internal 16 X 8 RAM that stores the coded display information.
   The  keyboard  section  consists  of  eight  lines  that  can  be  connected  to  eight
columns  of  a  keyboard,  plus  two  additional  lines  as well  as  to  shift  and
CNTL/STB  keys.  The  key  pressed  are  automatically  debounced  and  the
keyboard can operate in two modes two –key lock outor n-key rollover. If two
keys in the two –key lock out mode are pressed simultaneously, only first key is
recognized. In the N-key roll over mode, simultaneous key are recognized and
their codes are stored in the internal buffer.

Q.9    What are the differences between CGA and VGA graphics adapters?  (4)
Ans
   The  Color  Graphics  Adapter  (CGA),  originally also called the  Color/Graphics
Adapter  or  IBM  Color/Graphics  Monitor  Adapter  introduced  in  1981,  was
IBM's first color graphics card, and the first color computer display standard for
the IBM PC.
   The standard IBM CGA graphics card was equipped  with 16 kilobytes of video
memory, and could be connected either to a NTSC-compatible monitor or TV
via an RCA jack, or to a dedicated 4-bit "RBGI" interface CRT monitor, such as
the IBM 5153 color display.
   The  term  Video  Graphics  Array  (VGA)  refers  specifically  to  the  display
hardware  first  introduced  with  the  IBM  PS/2  line  of computers  in  1987,  but
through  its  widespread  adoption  has  also  come  to  mean  either  an  analog
computer  display  standard,  the  15-pin  D-subminiature  VGA  connector  or  the
640×480  resolution  itself.  While  this  resolution  has been  superseded  in  the
personal  computer  market,  it  is  becoming  a  popular  resolution  on  mobile
devices.
   VGA  was  officially  superseded  by  IBM's  XGA  standard,  but  in  reality  it was
superseded  by  numerous  slightly  different  extensions  to  VGA  made  by  clone
manufacturers that came to be known collectively as"Super VGA".

Q.10  What do you mean by A/D conversion? Explain anyone of the following A/D
techniques:
(i)  Successive approximation.
(ii)  Parallel / flash converter.
(5)
Ans
The electronic circuit, which translates an analogsignal into a digital signal, is
known as Analog - to – Digital converter (ADC).
AC23  Microprocessor Based System Design
14
(i)  Successive approximation ADC
   One method of addressing the digital ramp ADC's  shortcomings is the so-called
successive approximation ADC. The only change in this design is a very special
counter  circuit  known  as  a  successive-approximation register.  Instead  of
counting up in binary sequence, this register counts by trying all values of bits
starting  with  the  most  significant  bit  and  finishing  at  the  least-significant  bit.
Throughout the count process, the register monitorsthe comparator's output to
see  if  the  binary  count  is  less  than  or  greater  than  the  analog  signal  input,
adjusting the bit values accordingly. The way the register counts is identical to
the  "trial-and-fit"  method  of  decimal-to-binary  conversion,  whereby  different
values of bits are tried from MSB to LSB to get a binary number that equals the
original decimal number. The advantage to this counting strategy is much faster
results:  the  DAC  output  converges  on  the  analog  signal  input  in  much  larger
steps than with the 0-to-full count sequence of a regular counter.
   Without  showing  the  inner  workings  of  the  successive-approximation  register
(SAR), the circuit looks like this:
   Fig: Successive Approximation ADC Circuit

   It  should  be  noted  that  the  SAR  is  generally  capable  of  outputting  the  binary
number in serial (one bit at a time) format, thus eliminating the need for a shift
register.  Plotted  over  time,  the  operation  of  a  successive-approximation  ADC
looks like this:
Fig: Successive Approximation ADC Circuit Input andoutput Waveforms
ii.  Parallel / flash converter.
   Also called the parallel A/D converter, this circuit is the simplest to understand.
It is formed of a series of comparators, each one comparing the input signal to a
unique  reference  voltage.  The  comparator  outputs  connect  to  the  inputs  of  a
priority  encoder  circuit,  which  then  produces  a  binary  output.  The  following
illustration shows a 3-bit flash ADC circuit:

Fig: FLASH ADC Circuit
   Vref is a stable reference voltage provided by aprecision voltage regulator as
part  of  the converter  circuit, not  shown  in the  schematic.  As the analog  input
voltage  exceeds  the  reference  voltage  at  each  comparator,  the  comparator
outputs will sequentially saturate to a high state.The priority encoder generates
a  binary  number  based  on  the  highest-order  active  input,  ignoring  all  other
active inputs.

Q.11  What do you mean by external and internal data bus? How are these two related
in 8088 processor.   (2)
AnsInternal Data Bus: A bus that operates only withinthe internal circuitry of
the CPU, communicating among the internal caches ofmemory that are part of
the CPU chip’s design. This bus is typically ratherquick and is independent of
the rest of the computer’s operations.
   External Data Bus: A bus that connects a computer to peripheral devices. The
8088  microprocessor  has  16-bit  registers,  16-bit  internal  data  bus  and  20-bit
address bus, which allows the processor address up to 1 MB of memory.

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